This invention pertains generally to microelectronic processing and more particularly to the use of projection lithography employing extreme ultraviolet light for patterning features.
At the present time semiconductor electronics are produced by projection lithographic methods whereby a circuit pattern or blueprint is transferred from a mask onto a silicon wafer. The process is similar to exposing a film negative onto photographic paper except that the transferred image is reduced rather than enlarged thereby making the electronic component smaller. The demand for smaller critical dimensions in advanced computer chips is continuing to spur improvements in projection lithography. Presently, deep ultraviolet lithography systems, operating at 248 nm and producing 0.25 .mu.m features, are now commercially available and 193 nm lithography systems, capable of producing features in the 0.18 .mu.m range, are under development. In order to produce smaller features it is necessary to operate at even shorter wavelengths. By utilizing extreme ultraviolet (EUV) radiation in the range of 4.5-15 nm it is possible to produce features smaller than 0.18 .mu.m. The resolution and therefore, the minimum feature size that can be obtained with EUV is a factor of 2-6 times better than with the present deep-UV or 193 nm lithography. However, as will be discussed below, other features of the projection lithography process have impeded the use of shorter wavelengths.
Photoresists are photosensitive films used in projection lithography for transfer of images to a substrate. They form negative or positive images. After coating a substrate with a photoresist the coated substrate is exposed to a source of activating radiation. This radiation exposure causes a chemical transformation in the exposed areas of the coated surface. After the radiation exposure step, the photoresist-coated substrate is treated with a developer solution to dissolve or otherwise remove either the radiation-exposed or unexposed areas of the coated substrate, depending upon the type of photoresist used. Unfortunately, most photoresist materials absorb extreme ultraviolet (EUV) radiation strongly in the range of 4.5-15 nm. While this is advantageous from the standpoint of resist speed (i.e. the exposure dose required to form a pattern) and the associated printing rate, it poses a serious problem for projection lithographic methods that employ EUV radiation because of highly nonuniform absorption of this radiation through the photoresist thickness. In present photoresist materials, EUV radiation will not penetrate much beyond a film thickness of 0.15 or 0.20 .mu.m. Yet, to fabricate holes and other structures in semiconductor materials such as silicon, as well as metals, or dielectrics, the photoresist layer must be thick enough, preferably 0.5-1.0 .mu.m, to withstand etching and other processing steps. Accordingly, in order to make use of the increased resolution afforded by the use of EUV radiation in the processing and fabrication of small structures, photoresist schemes need to be employed that can be used in conjunction with high resolution EUV radiation and yet are compatible with conventional lithographic processing methods.
As set forth above, the ability to produce smaller dimensions in electronic devices offers significant advantages. Of particular interest is the ability to fabricate gates useful for field emitter applications. The basic technology, projection lithography, useful for fabricating field-imaging and electron-emitting structures has been described by Spindt in U.S. Pat. Nos. 3,812,559; 3,665,241; 3,755,704; 3,789,471 and 5,064,396. Smaller gates allow these devices to operate efficiently at significantly lower voltages. By operating at lower voltages inexpensive drive electronics can be used. With a gate size of 0.4 .mu.m, it is possible to employ CMOS circuitry rather than the more expensive bipolar circuits required for 1 .mu.m gates fabricated conventionally. Lower voltages also permit lower power operation and, therefore greater efficiency. Smaller gates permit higher tip packing density and a corresponding reduction in the current required from an average tip, thereby improving the lifetime of the tips. These desirable smaller features cannot be produced by present semiconductor fabrication technology. Consequently, having the ability to fabricate a patterned array of gates with an aperture size of 0.4 .mu.m or smaller is desirable. These same advantages pertain to semiconductor and other electronic devices.